The Cortex-M v7 MPU requires regions to be a power of two in size and aligned to their size. This can waste a lot of memory if they aren’t ordered efficiently. We developed our MpuPacker utility to help with this by optimizing the ordering and also recommending regions that can be reduced in size or … Continue reading Using MpuPacker to Minimize Waste
smxAware was enhanced with new features to help debug issues related to the Memory Protection Unit in SecureSMX systems. These are covered here. The IAR debugger displays the MPU registers like this: RNR can be manually patched to the slot number to view, which then shows the RBAR and RASR values for that slot. A … Continue reading MPU Debugging with smxAware
An RTOS makes development easier for many projects, and it makes them more expandable, maintainable, portable, and secure. Time and cost savings result.
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